Files
panda-meb/board/stm32fx/llrtc.h
Igor Biletskyy de7e1e7579 Deep sleep(stop) mode for pandas (#832)
* Add RTC with LSI for BP, GP, WP

* disable jenkins temporarily, REVERT!

* experiments

* cleanup is still needed

* cppcheck unused suppress

* raise deepsleep limit timeout to 120sec

* more experiments on usb_enumerated

* continue

* soft_disconnect

* almost done

* not enough

* no ignition

* still don't like it..

* rename to has_rtc_battery

* clock_source on the way!?

* delay 3 sec

* works on C3, needs test on C2

* And this is for C2

* disable bootkick

* misra 10.4

* ..

* ..

* set power state the right way

* change that

* seems don't need that? check on C2/C3

* partially works on RP...

* comments (will work after rebase)

* change fault name

* switch to manual activation mode

* Revert "disable jenkins temporarily, REVERT!"

This reverts commit 578d425fa7ba256f513c1c6ca54a00d69d78f53e.

* my dear pedal!
2022-03-07 14:24:04 -08:00

41 lines
1.1 KiB
C

#define RCC_BDCR_MASK_LSE (RCC_BDCR_RTCEN | RCC_BDCR_RTCSEL | RCC_BDCR_LSEMOD | RCC_BDCR_LSEBYP | RCC_BDCR_LSEON)
#define RCC_BDCR_MASK_LSI (RCC_BDCR_RTCEN | RCC_BDCR_RTCSEL)
void enable_bdomain_protection(void) {
register_clear_bits(&(PWR->CR), PWR_CR_DBP);
}
void disable_bdomain_protection(void) {
register_set_bits(&(PWR->CR), PWR_CR_DBP);
}
void rtc_wakeup_init(void) {
EXTI->IMR |= EXTI_IMR_MR22;
EXTI->RTSR |= EXTI_RTSR_TR22; // rising edge
EXTI->FTSR &= ~EXTI_FTSR_TR22; // falling edge
NVIC_DisableIRQ(RTC_WKUP_IRQn);
// Disable write protection
disable_bdomain_protection();
RTC->WPR = 0xCA;
RTC->WPR = 0x53;
RTC->CR &= ~RTC_CR_WUTE;
while((RTC->ISR & RTC_ISR_WUTWF) == 0){}
RTC->CR &= ~RTC_CR_WUTIE;
RTC->ISR &= ~RTC_ISR_WUTF;
//PWR->CR |= PWR_CR_CWUF;
RTC->WUTR = DEEPSLEEP_WAKEUP_DELAY;
// Wakeup timer interrupt enable, wakeup timer enable, select 1Hz rate
RTC->CR |= RTC_CR_WUTE | RTC_CR_WUTIE | RTC_CR_WUCKSEL_2;
// Re-enable write protection
RTC->WPR = 0x00;
enable_bdomain_protection();
NVIC_EnableIRQ(RTC_WKUP_IRQn);
}