mawei
/
panda
mirror of https://github.com/commaai/panda.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

misra8.7: board/stm32* (#2031) 

partial
This commit is contained in:
Maxime Desroches 2024-09-19 19:20:13 -07:00 committed by GitHub
parent a2d0b87d4e
commit df5db3fdb5
No known key found for this signature in database
GPG Key ID: B5690EEEBB952194
11 changed files with 22 additions and 21 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
board/drivers/uart.h
View File

@ -37,8 +37,6 @@ typedef struct uart_ring {
// ***************************** Function prototypes *****************************
void debug_ring_callback(uart_ring *ring);
void uart_tx_ring(uart_ring *q);
void uart_send_break(uart_ring *u);
// ******************************** UART buffers ********************************
// debug = USART2

2
board/stm32f4/llfan.h
View File

@ -1,5 +1,5 @@
// TACH interrupt handler
void EXTI2_IRQ_Handler(void) {
static void EXTI2_IRQ_Handler(void) {
volatile unsigned int pr = EXTI->PR & (1U << 2);
if ((pr & (1U << 2)) != 0U) {
fan_state.tach_counter++;

4
board/stm32f4/llspi.h
View File

@ -31,7 +31,7 @@ void llspi_mosi_dma(uint8_t *addr, int len) {
}
// SPI MOSI DMA FINISHED
void DMA2_Stream2_IRQ_Handler(void) {
static void DMA2_Stream2_IRQ_Handler(void) {
// Clear interrupt flag
ENTER_CRITICAL();
DMA2->LIFCR = DMA_LIFCR_CTCIF2;
@ -42,7 +42,7 @@ void DMA2_Stream2_IRQ_Handler(void) {
}
// SPI MISO DMA FINISHED
void DMA2_Stream3_IRQ_Handler(void) {
static void DMA2_Stream3_IRQ_Handler(void) {
// Clear interrupt flag
DMA2->LIFCR = DMA_LIFCR_CTCIF3;

9
board/stm32f4/lluart.h
View File

@ -20,7 +20,7 @@ void uart_tx_ring(uart_ring *q){
EXIT_CRITICAL();
}
void uart_rx_ring(uart_ring *q){
static void uart_rx_ring(uart_ring *q){
ENTER_CRITICAL();
// Read out RX buffer
@ -45,15 +45,10 @@ void uart_rx_ring(uart_ring *q){
EXIT_CRITICAL();
}
void uart_send_break(uart_ring *u) {
while ((u->uart->CR1 & USART_CR1_SBK) != 0U);
u->uart->CR1 |= USART_CR1_SBK;
}
// This read after reading SR clears all error interrupts. We don't want compiler warnings, nor optimizations
#define UART_READ_DR(uart) volatile uint8_t t = (uart)->DR; UNUSED(t);
void uart_interrupt_handler(uart_ring *q) {
static void uart_interrupt_handler(uart_ring *q) {
ENTER_CRITICAL();
// Read UART status. This is also the first step necessary in clearing most interrupts

4
board/stm32f4/peripherals.h
View File

@ -1,4 +1,8 @@
#ifdef BOOTSTUB
void gpio_usb_init(void) {
#else
static void gpio_usb_init(void) {
#endif
// A11,A12: USB
set_gpio_alternate(GPIOA, 11, GPIO_AF10_OTG_FS);
set_gpio_alternate(GPIOA, 12, GPIO_AF10_OTG_FS);

2
board/stm32h7/clock.h
View File

@ -25,7 +25,7 @@ typedef enum {
// TODO: find a better way to distinguish between H725 (using SMPS) and H723 (lacking SMPS)
// The package will do for now, since we have only used TFBGA100 for H723
PackageSMPSType get_package_smps_type(void) {
static PackageSMPSType get_package_smps_type(void) {
PackageSMPSType ret;
RCC->APB4ENR |= RCC_APB4ENR_SYSCFGEN; // make sure SYSCFG clock is enabled. does seem to read fine without too though

2
board/stm32h7/lladc.h
View File

@ -14,7 +14,7 @@ void adc_init(void) {
while(!(ADC1->ISR & ADC_ISR_ADRDY));
}
uint16_t adc_get_raw(uint8_t channel) {
static uint16_t adc_get_raw(uint8_t channel) {
uint16_t res = 0U;
ADC1->SQR1 &= ~(ADC_SQR1_L);
ADC1->SQR1 = (uint32_t)channel << 6U;

2
board/stm32h7/llfan.h
View File

@ -1,5 +1,5 @@
// TACH interrupt handler
void EXTI2_IRQ_Handler(void) {
static void EXTI2_IRQ_Handler(void) {
volatile unsigned int pr = EXTI->PR1 & (1U << 2);
if ((pr & (1U << 2)) != 0U) {
fan_state.tach_counter++;

6
board/stm32h7/llspi.h
View File

@ -49,7 +49,7 @@ void llspi_miso_dma(uint8_t *addr, int len) {
}
// master -> panda DMA finished
void DMA2_Stream2_IRQ_Handler(void) {
static void DMA2_Stream2_IRQ_Handler(void) {
// Clear interrupt flag
DMA2->LIFCR = DMA_LIFCR_CTCIF2;
@ -57,7 +57,7 @@ void DMA2_Stream2_IRQ_Handler(void) {
}
// panda -> master DMA finished
void DMA2_Stream3_IRQ_Handler(void) {
static void DMA2_Stream3_IRQ_Handler(void) {
ENTER_CRITICAL();
DMA2->LIFCR = DMA_LIFCR_CTCIF3;
@ -67,7 +67,7 @@ void DMA2_Stream3_IRQ_Handler(void) {
}
// panda TX finished
void SPI4_IRQ_Handler(void) {
static void SPI4_IRQ_Handler(void) {
// clear flag
SPI4->IFCR |= (0x1FFU << 3U);

6
board/stm32h7/lluart.h
View File

@ -1,4 +1,4 @@
void uart_rx_ring(uart_ring *q){
static void uart_rx_ring(uart_ring *q){
// Do not read out directly if DMA enabled
ENTER_CRITICAL();
@ -52,7 +52,7 @@ void uart_set_baud(USART_TypeDef *u, unsigned int baud) {
// This read after reading ISR clears all error interrupts. We don't want compiler warnings, nor optimizations
#define UART_READ_RDR(uart) volatile uint8_t t = (uart)->RDR; UNUSED(t);
void uart_interrupt_handler(uart_ring *q) {
static void uart_interrupt_handler(uart_ring *q) {
ENTER_CRITICAL();
// Read UART status. This is also the first step necessary in clearing most interrupts
@ -88,7 +88,7 @@ void uart_interrupt_handler(uart_ring *q) {
EXIT_CRITICAL();
}
void UART7_IRQ_Handler(void) { uart_interrupt_handler(&uart_ring_som_debug); }
static void UART7_IRQ_Handler(void) { uart_interrupt_handler(&uart_ring_som_debug); }
void uart_init(uart_ring *q, int baud) {
if (q->uart == UART7) {

4
board/stm32h7/peripherals.h
View File

@ -1,4 +1,8 @@
#ifdef BOOTSTUB
void gpio_usb_init(void) {
#else
static void gpio_usb_init(void) {
#endif
// A11,A12: USB
set_gpio_alternate(GPIOA, 11, GPIO_AF10_OTG1_FS);
set_gpio_alternate(GPIOA, 12, GPIO_AF10_OTG1_FS);