diff --git a/board/stm32fx/clock.h b/board/stm32fx/clock.h
index 4f7beaae4..f2386328d 100644
--- a/board/stm32fx/clock.h
+++ b/board/stm32fx/clock.h
@@ -4,7 +4,7 @@ void clock_init(void) {
   while ((RCC->CR & RCC_CR_HSERDY) == 0);
 
   // divide things
-  register_set(&(RCC->CFGR), RCC_CFGR_HPRE_DIV1 | RCC_CFGR_PPRE2_DIV2 | RCC_CFGR_PPRE1_DIV4, 0xFF7FFCF3U);
+  register_set(&(RCC->CFGR), RCC_CFGR_HPRE_DIV1 | RCC_CFGR_PPRE2_DIV2 | RCC_CFGR_PPRE1_DIV2, 0xFF7FFCF3U);
 
   // 16mhz crystal
   register_set(&(RCC->PLLCFGR), RCC_PLLCFGR_PLLQ_2 | RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLN_6 | RCC_PLLCFGR_PLLN_5 | RCC_PLLCFGR_PLLSRC_HSE, 0x7F437FFFU);
diff --git a/board/stm32fx/llbxcan.h b/board/stm32fx/llbxcan.h
index f1d5187cb..4da45473d 100644
--- a/board/stm32fx/llbxcan.h
+++ b/board/stm32fx/llbxcan.h
@@ -1,9 +1,10 @@
-// this is needed for 1 mbps support
-#define CAN_QUANTA 8U
-#define CAN_SEQ1 6 // roundf(quanta * 0.875f) - 1;
-#define CAN_SEQ2 1 // roundf(quanta * 0.125f);
+// SAE 2284-3 : minimum 16 tq, SJW 3, sample point at 81.3%
+#define CAN_QUANTA 16U
+#define CAN_SEQ1 12U
+#define CAN_SEQ2 3U
+#define CAN_SJW  3U
 
-#define CAN_PCLK 24000U
+#define CAN_PCLK 48000U
 // 333 = 33.3 kbps
 // 5000 = 500 kbps
 #define can_speed_to_prescaler(x) (CAN_PCLK / CAN_QUANTA * 10U / (x))
@@ -32,9 +33,10 @@ bool llcan_set_speed(CAN_TypeDef *CAN_obj, uint32_t speed, bool loopback, bool s
 
   if(ret){
     // set time quanta from defines
-    register_set(&(CAN_obj->BTR), ((CAN_BTR_TS1_0 * (CAN_SEQ1-1)) |
-              (CAN_BTR_TS2_0 * (CAN_SEQ2-1)) |
-              (can_speed_to_prescaler(speed) - 1U)), 0xC37F03FFU);
+    register_set(&(CAN_obj->BTR), ((CAN_BTR_TS1_0 * (CAN_SEQ1-1U)) |
+                                   (CAN_BTR_TS2_0 * (CAN_SEQ2-1U)) |
+                                   (CAN_BTR_SJW_0 * (CAN_SJW-1U)) |
+                                   (can_speed_to_prescaler(speed) - 1U)), 0xC37F03FFU);
 
     // silent loopback mode for debugging
     if (loopback) {
@@ -97,7 +99,7 @@ bool llcan_init(CAN_TypeDef *CAN_obj) {
     register_clear_bits(&(CAN_obj->FMR), CAN_FMR_FINIT);
 
     // enable certain CAN interrupts
-    register_set_bits(&(CAN_obj->IER), CAN_IER_TMEIE | CAN_IER_FMPIE0 |  CAN_IER_WKUIE);
+    register_set_bits(&(CAN_obj->IER), CAN_IER_TMEIE | CAN_IER_FMPIE0 |  CAN_IER_WKUIE | CAN_IER_ERRIE | CAN_IER_BOFIE);
 
     if (CAN_obj == CAN1) {
       NVIC_EnableIRQ(CAN1_TX_IRQn);
diff --git a/board/stm32h7/llfdcan.h b/board/stm32h7/llfdcan.h
index b598cc087..ae44a95f9 100644
--- a/board/stm32h7/llfdcan.h
+++ b/board/stm32h7/llfdcan.h
@@ -108,7 +108,7 @@ bool llcan_set_speed(FDCAN_GlobalTypeDef *CANx, uint32_t speed, uint32_t data_sp
     uint8_t sp = CAN_SP_NOMINAL;
     uint8_t seg1 = CAN_SEG1(tq, sp);
     uint8_t seg2 = CAN_SEG2(tq, sp);
-    uint8_t sjw = seg2;
+    uint8_t sjw = MIN(127U, seg2);
 
     CANx->NBTP = (((sjw & 0x7FU)-1U)<<FDCAN_NBTP_NSJW_Pos) | (((seg1 & 0xFFU)-1U)<<FDCAN_NBTP_NTSEG1_Pos) | (((seg2 & 0x7FU)-1U)<<FDCAN_NBTP_NTSEG2_Pos) | (((prescaler & 0x1FFU)-1U)<<FDCAN_NBTP_NBRP_Pos);
 
@@ -121,7 +121,7 @@ bool llcan_set_speed(FDCAN_GlobalTypeDef *CANx, uint32_t speed, uint32_t data_sp
     tq = CAN_QUANTA(data_speed, prescaler);
     seg1 = CAN_SEG1(tq, sp);
     seg2 = CAN_SEG2(tq, sp);
-    sjw = seg2;
+    sjw = MIN(15U, seg2);
 
     CANx->DBTP = (((sjw & 0xFU)-1U)<<FDCAN_DBTP_DSJW_Pos) | (((seg1 & 0x1FU)-1U)<<FDCAN_DBTP_DTSEG1_Pos) | (((seg2 & 0xFU)-1U)<<FDCAN_DBTP_DTSEG2_Pos) | (((prescaler & 0x1FU)-1U)<<FDCAN_DBTP_DBRP_Pos);
 
diff --git a/tests/debug_console.py b/tests/debug_console.py
index c47a37eb6..d0c9628aa 100755
--- a/tests/debug_console.py
+++ b/tests/debug_console.py
@@ -44,6 +44,8 @@ if __name__ == "__main__":
             if claim:
               panda.serial_write(port_number, ln)
           time.sleep(0.01)
+    except KeyboardInterrupt:
+      break
     except Exception:
       print("panda disconnected!")
       time.sleep(0.5)