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https://github.com/infiniteCable2/panda.git
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5ac6305a95
* remove DPANDA * -22 * lil more * canfd * lil more * update cppcheck * uart cleanup * always harness * sbu sense * lil more * enable spi * rm ENABLE_SPI
51 lines
1.2 KiB
C
51 lines
1.2 KiB
C
#pragma once
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#include "crc.h"
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#define SPI_TIMEOUT_US 10000U
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// got max rate from hitting a non-existent endpoint
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// in a tight loop, plus some buffer
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#define SPI_IRQ_RATE 16000U
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#ifdef STM32H7
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#define SPI_BUF_SIZE 2048U
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// H7 DMA2 located in D2 domain, so we need to use SRAM1/SRAM2
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__attribute__((section(".sram12"))) extern uint8_t spi_buf_rx[SPI_BUF_SIZE];
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__attribute__((section(".sram12"))) extern uint8_t spi_buf_tx[SPI_BUF_SIZE];
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#else
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#define SPI_BUF_SIZE 1024U
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extern uint8_t spi_buf_rx[SPI_BUF_SIZE];
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extern uint8_t spi_buf_tx[SPI_BUF_SIZE];
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#endif
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#define SPI_CHECKSUM_START 0xABU
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#define SPI_SYNC_BYTE 0x5AU
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#define SPI_HACK 0x79U
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#define SPI_DACK 0x85U
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#define SPI_NACK 0x1FU
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// SPI states
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enum {
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SPI_STATE_HEADER,
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SPI_STATE_HEADER_ACK,
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SPI_STATE_HEADER_NACK,
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SPI_STATE_DATA_RX,
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SPI_STATE_DATA_RX_ACK,
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SPI_STATE_DATA_TX
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};
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extern uint16_t spi_checksum_error_count;
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#define SPI_HEADER_SIZE 7U
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// low level SPI prototypes
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void llspi_init(void);
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void llspi_mosi_dma(uint8_t *addr, int len);
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void llspi_miso_dma(uint8_t *addr, int len);
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void can_tx_comms_resume_spi(void);
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void spi_init(void);
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void spi_rx_done(void);
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void spi_tx_done(bool reset);
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